Vpu Rtl Design Engineer (Barcelona)

Job Reference

963_24_CS_VPU_RE2-3

Position

VPU RTL Design Engineer - DARE (RE2-3)

Closing Date

Friday, 28 February 2025

Overview

The DARE European Supercomputing Project offers a chance to design the vector unit for a next‑generation HPC processor based on the RISC‑V ISA. Key objectives include improving the microarchitecture for out‑of‑order and superscalar vector execution, designing a memory interface, evaluating integration of the RISC‑V matrix extension, and contributing to research papers for top conferences.

Responsibilities

• Design and implement advanced features for out‑of‑order execution in the vector unit.

Requirements

• Education: Bachelor, Master or PhD in computer science or electronic engineering.
• Strong background in computer architecture, including in‑order, out‑of‑order, superscalar, and vector architectures.
• Good knowledge of the RISC‑V ISA a...