Technical Lead II - VLSI

Axelon Services Corporation

📍 Mountain View, California, United States

Full-time Computer Occupations

Job Description

 Job Title: FPGA Design Verification Engineer
Location: Mountain View, CA

 Job Description Strong understanding of FPGA design principles and architectures.

 Proficiency in System Verilog and UVM verification methodology.

 Experience with industry-standard verification tools (, QuestaSim, Synopsys VCS).

 Knowledge of code coverage and functional coverage analysis.

 Excellent debugging and problem-solving skills.

 Strong communication and collaboration skills.
 Requirements
 Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field.

 Experience in FPGA verification.

 Experience with scripting languages (, Python, Perl).

 Familiarity with hardware description languages (, VHDL, Verilog).
 Must Have Skills
 Strong understanding of FPGA design principles and architectures
        
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Job Details

Location Mountain View, California

Job Type Full-time

Category Computer Occupations

Posted July 20, 2026

Deadline August 29, 2026