Job Description
Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:SoC Design & Synthesis EngineerThis role focuses on synthesizing large‑scale SoC RTL designs into high‑quality gate‑level netlists that are ready for Place & Route. Responsibilities include owning all synthesis inputs, executing multi‑stage synthesis flows, and ensuring netlist quality with respect to timing, power, and DFT requirements prior to Physical Design handoff.The role also contributes to PPA (Power, Performance, Area) optimization by analyzing trade‑offs and recommending design or constraint improvements, while working closely with Design, DFT, and Physical Design teams to resolve issues early in the flow. In addition, the engineer supports functional ECOs and validates post‑change correctness to improve functionality and fix late‑stage issues, ensuring timely delivery of robust, manufacturable designs used in Snapdragon prod...