Senior/ Lead Physical Design (PnR) Engineer

We are seeking experienced Senior / Lead Physical Design (PnR) Engineers to join our semiconductor design team. The successful candidates will lead the physical implementation of high-speed I/O PHYs on advanced technology nodes, ensuring designs meet aggressive performance, power, area (PPA), timing, and manufacturability goals. This role requires close collaboration with front-end designers, circuit designers, layout engineers, and methodology teams throughout the full chip implementation flow.

Key Responsibilities

• Lead the physical design implementation of high-speed PHY IPs , including SerDes, DDR I/O, and other high-speed interface blocks.
• Own the complete RTL-to-GDSII physical design flow, including Floorplanning, Power planning, Placement, Clock Tree Synthesis (CTS), Routing, Timing closure, Physical verification and signoff.
• Drive PPA optimization while ensuring timing, signal integrity, power integrity, an...