Senior HBM Layout Engineer for AI & HPC

Micron Technology, Inc. seeks a Senior Engineer in Tlaquepaque, Jalisco, to design layouts for high bandwidth memory solutions used in AI applications. The ideal candidate will have over 5 years of experience in analog layout design and expertise in Cadence tools.

This role emphasizes collaboration with engineering teams and supports advanced memory technologies. Strongly motivated candidates who can achieve project milestones are encouraged to apply.