Senior ASIC DV Engineer
Broadcom Inc.
📍 San Jose, California, United States
Job Description
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Job Description:
You will contribute to the development of complex SOCs targeted towards Touch Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include:
Architecting block and full-chip verification environments using HVLs (UVM) and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces.
Using your thorough knowledge of mixed-signal simulations (AMS, Spice, etc), developing test plans and coverage metrics from specifications and writing block and chip-level tests.
Debugging RTL and Gate simulations and work with design engineers to verify fixes.
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