Senior AMS Circuit Design Engineer – High-Speed I/O

UST Malaysia in Penang is seeking an experienced analog/mixed-signal circuit design engineer to design high-speed interfaces like SerDes and DDR, and to develop clocking and power management circuits. You will perform transistor-level simulations and collaborate with layout teams to ensure robust tapeouts.

The role requires 4+ years in analog/mixed-signal design, proficiency with Cadence Virtuoso/ADE/Spectre, and strong knowledge of noise and signal integrity across ≤7nm nodes.