PCIe Link Controller Design Engineer - Equity & Perks

DEEPX is seeking a PCIe-focused hardware engineer in Mexico to design and implement PCIe Controller and Link Layer for our NPU SoCs. You will work with RTL (Verilog/SystemVerilog), perform synthesis and timing analysis, and collaborate with verification, firmware, and system teams for end-to-end PCIe functionality.

The role requires a strong background in PCIe Gen4/Gen5, high-speed interfaces, and hands-on experience with FPGA prototyping in a fast-paced startup environment.