Packaging Engineer (Substrate Design and Layout)
S
Sandisk
📍 Taiwan, Taichung City, Taiwan
Job Description
Job Description
- Optimize die bonding pad, flip chip die plot, and substrate layout to streamline design complexity and reduce cost for ASIC and SiP packaging solutions, including SSD/PSSD NAND BGA, uSD, SD/SD express and USB products.
- Support the development and integration of new planform packaging technologies/new NAND generation, new ASIC, Emphasis is placed on interposer/substrate/board co-design, design rule definition, and cross-functional collaboration.
- Conduct substrate layout feasibility studies, die fitment analysis based on Org. playbook, and prepare comprehensive design documentation.
- Maintain and manage design libraries, and generate accurate bonding diagrams to support layout and assembly processes.
- Collaborate closely with hardware, assembly, and packaging engineering teams across multiple Sandisk sites to enable new product development and continuous substrate design improvement.
- Interface with ass...