Memory Design Automation – Memory Modeling, Technical Manager

Seeking for an experienced Memory Design automation individual to join the team.

• Develop and integrate automation code into existing memory compilers to generate models meant for ASIC design flow.
• Develop automation flow and scripts with Perl or Python.
• Execute EDA tools from vendors such as Synopsys, Mentor to verify models’ correctness.
• Stay up to date with current modeling standards and development to improve models and flows for better memory IP performance.
• Work with memory design, compiler team and DFT team and tool vendors to resolve model issues and find solutions.

• Bachelor’s Degree or higher in Electrical Engineering, Electronics Engineering, or related discipline with at least 8 years of semiconductor industry experience.
• With min. 8 years of experience using Linux systems.
• Good understanding of verilog syntax and its various aspects,...