[HW] SoC Design (MIPI, ISP & DSC Subsystem)

Responsibilities

• ISP & MIPI Pipeline Integration: Integrate ISP (Image Signal Processor) IPs with MIPI CSI-2 interfaces to establish a seamless front‑end image processing pipeline.
• Sensor Interface & Tuning Support: Collaborate with sensor vendors to optimize data reception and initial image signal processing for AI‑based vision tasks.
• DSC IP Integration: Integrate and verify Display Stream Compression (DSC) IP blocks into the MIPI subsystem to optimize real‑time data flow and memory bandwidth.
• Subsystem Architecture: Design and implement the subsystem RTL to seamlessly connect MIPI interfaces, ISP pipelines and compression IPs, ensuring robust and ultra‑low power operation.
• Cross‑functional Collaboration: Work with hardware, software and external IP vendor teams for IP evaluation, bring‑up and commercialization of AI in edge devices.

Qualifications

• IP Integration & Verification Skills: Profic...