[hw] high-speed interface si/pi engineer

Role Overview

As an SI/PI Engineer at Deep X, you will be responsible for ensuring the electrical integrity of our cutting‑edge AI chip environments. You will focus on the analysis and optimization of high‑speed interfaces and robust Power Delivery Networks (PDN) across the entire hardware ecosystem—from Silicon and Package to the System Board. Your critical mission is to ensure our NPU solutions maintain peak performance, signal fidelity, and rock‑solid power stability under extreme computational loads and sudden switching events.

Responsibilities PDN & Power Integrity Analysis: Perform comprehensive PDN analysis including DC/AC frequency‑domain analysis (Target Impedance profiling) and time‑domain transient simulations to guarantee stable power delivery from the VRM to the die. NPU Transient Power Management: Analyze and mitigate in‑rush current and severe di/dt noise caused by simultaneous switching of massive digital blocks (e.g., MAC arrays) in NPU architectures. Establis...

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