Design Verification Engineer - FPGA & SystemVerilog Specialist

Lattice Semiconductor is seeking a Design Verification Engineer to join its RnD organization in George Town, Malaysia. This dynamic role offers the chance to contribute, learn, and grow within a fast-paced team dedicated to innovative solutions.

The ideal candidate will have a BS/MS/PhD in Electronics or Computer Engineering and at least 5 years of experience with SystemVerilog/UVM. Key responsibilities include developing test plans, creating verification environments, and debugging tests.

A comprehensive compensation and benefits program is offered to attract and retain top talent.