CPU DFD Validation Engineer: Post-Silicon Debug (Hybrid)

Intel is seeking a CPU DFD (Design-For-Debug) Validation Engineer in Penang, Malaysia, to verify DFD logic designs against CPU specifications and develop debug software for in-house and external validation. You will develop verification plans, run system simulations, and collaborate with CPU architects, RTL and physical design teams to ensure viable post-silicon debug usage.

Ideal candidates have a Bachelor's/Master’s in Electrical or Computer Engineering, 2+ years of experience, strong