ASIC Timing and Methodology Engineer

Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute, Automotive and IOT marketsThe candidate will work with best-in-class methodologies, tools and technology to design innovative SOC products at the block/IP-level and at system-level in 5nm, 4nm and beyond (process technologies).You will be working with physical design team (and other teams) on timing closure, CAD teams, IP teams and Design Technology Teams for flow scripts/tools development and validation.Responsible for Spice simulations (Hspice/Finesim/AFS/Spectre/Infinisim) for PVT corners validation and STA vs spice correlation. Timing package validation across advanced process technologies using PT/PT-SI and Tempus.You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in class timing ECO tools . Work ...

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