Job Description
- Expertise in Design for Test / DFT
- Expertise in coding using Verilog RTL, and scripting language like TCL, and/or Perl
- Proficient in Unix/Linux environments
- Expertise in Scan compression and insertion, Memory BIST, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate-level verification, silicon debug
- Expertise with Siemens, Cadence, and/or Synopsys DFT and simulation tools
- Preferred resources with valid work permit